Projekt sinteze open source MCU i osciloskopa u FPGA programabilnoj logici za EEZ DIB modularni T&M koncept je sufinanciran sredstvima Hrvatske agencije za malo gospodarstvo, inovacije i investicije (HAMAG-BICRO) iz Programa provjere inovativnog koncepta

The FPGA programmable logic synthesis of open source MCU and oscilloscope for EEZ DIB modular

T&M concept project is co-financed by the Croatian Agency for SMEs, Innovation and Investments (HAMAG-BICRO) from the Proof of Concept Program (PoC7)


The main objective of the project is to introduce FPGA technology in the existing open source EEZ DIB concept for modular T&M (Test & Measurement) solutions, and EEZ BB3, its first practical implementation whose master (control) module uses a 32-bit general purpose microcontroller (MCU).


FPGA technology should advance two aspects that the MCU cannot adequately respond to: realtime processing of large amounts of data, which often implies both parallelism in work and socalled software definition of hardware that allows modification of existing functionality or obtaining completely new functionality at the hardware level.


Instead of complementing the existing MCU with FPGA, we will try to remove MCU completely and synthesize MCU functionality on FPGA silicon using the f32c and FPGArduino open source projects. This will also allow flexibility in the choice of MCU architecture (MIPS or RISC-V).


The project also includes an innovative concept of sharing video content that can come from two sources: the f32c module, which will be in charge of the HMI (i.e. user interface); and the displayed real-time data measurements will come from an open source ScopeIO module that has the functionality of an oscilloscope and logic analyzer. Split displaying will also be attempted between two screens: the TFT touchscreen display which is an integral part of the EEZ BB3 chassis but also an external screen with HDMI input (for better visibility, for presentation purposes, etc.).


Using FPGAs from the Lattice ECP5 series with its attractive price, capabilities and the existence of an open source “toolchain” will further increase the attractiveness and competitiveness of the EEZ BB3 offering. Together with positive outcome of this project, it will simplify the further development of more sophisticated EEZ DIB T&M modules.


The project will be run in collaboration with the team behind the ULX3S project from




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Early prototypes

Intermediate prototypes

Finished prototype ready for crowdfunding


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5.6. HCOPy

The Hardcopy commands are used to print the entire display to a specified file rather than “printing” to an external device.


SCPI command





Initiates hardcopy output

:DESTination {<destination>}

Sets the hardcopy destination


Initiates hardcopy output

5.6.1. HCOPy:DESTination


HCOPy:DESTination {<destination>}


Not implemented yet


This command sets the hardcopy destination. The destination is always set to MMEMory (i.e. SD Card). This command is included only for compatibility with the SCPI standard. The destination file on the mass memory device is specified by the MMEMory:NAME command.

Usage example


Related Commands




5.6.2. HCOPy[:IMMediate]




Not implemented yet


This command immediately initiates hardcopy output according to the current HCOPy setup parameters. This command is the same as HCOPy:SDUMp[:IMMediate].

Usage example

MMEM:NAME "sample1.png"





Related Commands



5.6.3. HCOPy:SDUMp[:IMMediate]




Not implemented yet


This command initiates a screen dump of the entire TFT display's screen, and is the same as the HCOPy[:IMMediate] command.

Usage example

MMEM:NAME "sample2.png"





Related Commands




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Load transient response testing using MOSFET switch

The load transient response illustrates a power supply's ability to respond to abrupt changes in load current. The simplest way to achieve that is to use a MOSFET as a fast switch that will connect an additional load in parallel, increasing output current. The output voltage is shown on the scope image in yellow trace and the voltage on the MOSFET input in blue.


Fig. 1: Load transient response tested with MOSFET switch

Load transient response testing using a closed loop load transient tester

Load transient response (or recovery) can be measured more accurately using the dedicated tester described here. Additionally, remote sensing has to be deployed and oscilloscope probe has to be applied on the power output terminals. Result is shown in Fig. 2 for step load of 1 A, while output voltage was 12 V.


Fig. 2: Transient response measured with load tester

Short circuit recovery

Testing short circuit can be also done using the MOSFET switch, but that is directly connected to the power supply’s output terminals. The output voltage is set to 6 V. The output current is also set to a maximum value of 5 A. On Fig. 3, the yellow trace is the output voltage, and the blue trace the MOSFET gate signal. Measured recovery from a shorted output is below 2 ms.


Fig. 3: Short circuit recovery

Capacitive load

The Capacitive load testing is performed by simply connecting a capacitor to the output terminals with oscilloscope probe already connected, A huge output voltage drop is expected from an uncharged capacitor. Fig. 4 shows what happened when the output voltage is set to 30 V and a 10 000 μF electrolytic capacitor is connected. The output after recovery remains stable, without sign of oscillation.


Fig. 4: Output voltage drop when a 10 000 μF uncharged capacitor is connected


When down-programmer is present and activated (that is a default for the DCP405 module) it is important to check how it behaves with huge capacitive load connected while programmed output voltage varies. Fig. 5 shows voltage that output voltage rises and falls without visible oscillations when 2200 μF is connected on the output and no resistive load is presented. The down-programmer needs only 20 ms to discharge such huge load (charged to 30 V). It has to dissipate that in heat. Therefore performing such testing with high frequency will rise the main heatsink temperature considerably, but MCU will acts by increasing cooling fan speed accordingly.


Fig. 5: Charge and discharge of 2200 μF capacitor (Down-programmed enabled)

Inductive load

The DCP405 module behavior with the connected inductive load is tested by repetitively applying 100 μH power inductor using once again the MOSFET switcher. Output voltage is set to 30 V and current to 5 A. Power output (yellow trace) does not shows any sign of oscillation.


Fig. 6: Output voltage with 100 μH inductive load connected

Output voltage programming (internal DAC)

Testing the output voltage programming can demonstrate undesirable overshoots or undershoots when the output voltage is changed rapidly. In addition this test can give us an idea of responsiveness of the complete system (i.e. power supply firmware, and the settling time of the output). The result shown in Fig. 7 was generated by step change the output voltage from 5 V to 40 V, with no load connected. The programming period is just 6 ms (167 Hz).


Fig. 7: Fast programming (via SCPI LIST), full range, no load

The rising time without load connected for full range step (i.e. 0 to 40 V) is shown on Fig. 8. and falling time (with down-programmer activated) on Fig. 8.


Fig. 8: Output voltage rising time (no load, full range)


Fig. 9: Output voltage falling time (no load, full range)

Output voltage programming (external signal source)

The DCP405 power module can be also programmed from an external source using the protected input accessible via the front panel push-in connector. As in the case of internal programming, +2.5 V is required for full scale. In this operating mode it is possible to measure the maximum settling time because the input analog control signal is applied directly to the CV control loop.

A square wave and sine wave programming external signals are used to get results shown in Fig. 10 and Fig. 11. Since sine wave programming could goes up to 400 Hz it could be used to emulate ripple of fully rectified mains ripple (i.e. 100 or 120 Hz).


Fig. 10: Output voltage programming from external source (100 Hz square wave)


Fig. 11: Output voltage programming from external source (400 Hz sine wave)

Change the mode of operation (CV/CC)

The DCP405 changes its operational mode when a particular programmed output value is reached. A sudden change in resistance that could change a mode of operation must be “smooth” – no oscillation nor overshooting are permitted during a transition. This test was performed by repetitively connecting and disconnecting an additional load with a MOSFET switcher driven by the signal generator (blue trace). The output voltage was set to 40 V and current limited to 500 mA. Therefore when the right load is applied, the DCP405 module should change mode from CV to CC which will cause the output voltage to drop as shown on Fig. 12.


Fig. 12: Mode of operation changes

Power on, forced power off, standby and soft reset

When the power module is powered on or off, the output voltage should show no signs of overshoot. Powering on with output voltage set to 30 V is shown on Fig. 13. and powering off on Fig. 14.


Fig. 13: Power on, Vout=30 V, no load connected


Fig. 14: Power off (AC main unplugged), Vout=30 V, no load connected

Entering standby mode is equal to powering off but preformed under firmware control. Therefore its possible to disable power output first and then remove the input power. The results is visible on Fig. 15.


Fig. 15: Entering the stand-by mode, Vout = 25 V, no load connected

Executing soft start is similar to standby mode but without removing input power. Therefore the output voltage drop is even faster since post-regulator control circuits remain functional, output voltage is set to zero, and output capacitor discharge is assisted by down-programmer (Fig. 16.).


Fig. 16: Output voltage drop on soft reset


The down-programmer circuit rapidly draws off the energy stored in the output capacitor and connected device’s input capacitor. Effectively, it sinks the current from the capacitors back inside the power module where it is dissipate into heat. If programmed voltage drop in short period of time (tens of milliseconds) is large (e.g. 30 V to 0 V), the output voltage without down-programmer cannot be set as it is shown in Fig. 17. The same voltage drop can be easily accomplished with down-programmer circuit enabled (Fig. 18.)


Fig. 17: 30 V step without load and down-programmed disabled


Fig. 18: 30 V step without load and down-programmed enabled

HW (crowbar) OVP

The DCP405 module comes with both software and hardware OVP (over-voltage protection). The response time of the software based OVP is limited by the execution speed of firmware that take care of all modules and has to periodically check if set OVP threshold is reached or not. It could be too slow when protection of the sensitive connected device is needed that cannot tolerate more then few percents over its nominal supply voltage.

Operation of the hardware based OVP on the other side is not affected with other tasks that MCU has to accomplish since it is accomplished by dedicated circuit to monitor output voltage. Therefore it can act as fast as that circuit can reacts (i.e. its crowbar element in the first place).

Hardware OVP circuit has fixed threshold level that is set to approximately 5% above programmed output voltage. On Fig. 19, the output voltage is set to 30 V and “error” voltage of 31.5 V is applied from external source on the DCP405's power output terminals. The response time is within 20 μs that is almost two order of magnitude better then software based OVP. The similar response time of about 30 μs can be measured for lower set output voltage, e.g. 3.3 V as shown on Fig. 20.


Fig. 19: OVP tripped on Vout = 30 V


Fig. 20: OVP tripped on Vout = 3.3 V

Output ripple and noise (PARD)

The PARD (Periodic and Random Deviation) that exists on the power output is caused mainly by switching power pre-regulator and to some extent by bias power supply noise because the post-regulator circuit has limited ability to reject such switching noise. Since PARD consists of low level, broadband signals, major test set concerns are ground loops, proper shielding, and impedance matching. PARD measurement setup is shown on Fig. 21. To block the DC current a 4.7 μF capacitor is connected in series with the signal path, and to eliminate cable ringing and standing waves 50 Ω in-line terminator is used. Protective Earth (PE) of DSO and power module are directly connected to reject common mode noise as shown on Fig. 22.


Fig. 21: PARD measurement setup


Fig. 22: PARD measurement setup on DSO side


On Fig. 23 is shown DSO own noise when its input is shorted to ground and give us an idea about error that should be taken into account when measuring low level signals such as PARD.


Fig. 23: DSO noise (grounded input)

On the power module side, an additional 22 μF elco + 1 μF MLCC are used where probing is taken place (Fig. 24) because we cannot perform measurement directly on the Cout that is tens of millimeters far away behind the power module front panel. That gives us result shown on Fig. 25 for output current of 1.5 A.


Fig. 24: PARD measurement on power module output with decoupling, Iout = 1.5 A


Fig. 25: Output ripple and noise, Iout = 1.5 A


As an example of how setup of such measurement is sensitive, the PARD is also measured on the output of BNC adapter without additional output decoupling on the power terminals (Fig. 26). The results looks much worse but still below 10 mVpp.


Fig. 26: PARD measurement on BNC adapter, Iout = 1.5 A


Fig. 27: Output ripple and noise, Iout = 1.5 A

Thermal measurements

Components that are on the power path are exposed to the highest thermal stress due to various loses when DCP405 is delivering the maximum current, i.e. 5 A. Handheld thermal camera Seek Reveal Pro RQ-EAAX is used to inspect temperature of few critical components. The DCP405 module under test was inserted in Slot #1 of the BP3C backplane and the cooling fan is running on the highest speed as it is defined by firmware control algorithm in that case.

The pre-regulator's power inductor temperature can be seen on Fig. 28. Its temperature is about 60 oC, but we can see on the picture that highest captured temperature is 75 oC and it belongs to area around power MOSFET (Q1) and diode (D2).


Fig. 28: Pre-regulator's power inductor, Iout = 5 A

Next area of interest is post-regulator's “pass” transistors (Q3, Q4) packages that are mounted on the main heatsink. As shown on Fig. 29. their package's temperature are equal that means they are evenly loaded thanks to balancing resistors.


Fig. 29: Post-regulator's "pass" BJTs, Iout = 5 A

The highest captured temperature on Fig. 29. belongs to balancing resistors R25, R26 as it is shown on Fig. 30.


Fig. 30: Post-regulator's balancing resistors, Iout = 5 A





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Current version



Completed, ready for production

PCB manufactured

Yes (r2B6)

PCB assembled

Yes (r2B6)


Yes (TME, Mouser, Digikey, Farnell, RS)

File repository
(include Eagle, Gerber and BOM files)


TAPR v1.0


C4.1 (Collective Code Construction Contract)


Fig. 1: DCM220 r2B6 prototype


Output power terminals
coupling capability (require BP3C backplane)



Split rails

Common ground





Feature list

  • Power input: 48 Vdc (e.g. Mean Well LRS-150F-48)
  • Max. output power: 70 W per channel
  • Voltage regulation (CV), 1 – 20 V. Voltage set resolution (U_SET): 12-bit, read resolution (U_MON): 15-bit
  • Current regulation (CC), max. 4 A. Current set resolution (I_SET): 12-bit, Current read resolution (I_MON): 15-bit. Min. measured current: 100 mA
  • Output enable (OE) with LED indicator
  • CC mode LED indicator
  • On-board power output terminals (Ø4 mm, 19 mm/0.75” pitch)
  • 10-pin connector for Vout- coupling with other Power boards
  • Galvanically isolated SPI bus for communication with the MCU board
  • I2C EEPROM for storing board specific configuration and calibration parameters
  • On-board STM32F373C8T6 32-bit ARM Cortex®-M4 MCU, 64 KiB Flash, 32 KiB SRAM, LQFP-48 package
  • Upgradeable firmware via DIB v1.0 UART lines
  • SWG/JTAG connector (optional)
  • Two temperature sensors
  • Dimensions: 155 x 95 mm, 2-layer PCB


Fig. 2: DCM220 power module block diagram

Bias power supply

The bias power supply is built around low power buck step-down converter (IC2), and thanks to coupled inductor (TR1) it provides both positive and negative rails of about 8 V for analog section. Digital section is powered with +3.3 V that is derived from LDO (IC5).

The IC2 also provides POWERGOOD signal that indicates MCU what is module's power condition. It is related to UVLO (under-voltage lockout) functionality that is controlled with voltage divider consists of R3, R6. Therefore the step-down converter will cut-off power when input voltage drops below 33 V, and starts again when it rises above 38 V.

EEZ DIB interface

The DCP220 module interface with the MCU module is accomplished over the 28-pin 0.1” right angled header (X2). Since its power output has to be isolated (“floated”) all digital control lines has to be isolated. Therefore two high speed digital isolators (IC1, IC3) are used.

Onboard I2C EEPROM (IC4) provides storage for module-specific information such as its ID, calibration data, working hours counters, etc. Please note that it is on the A-side of the isolation barrier, because the same I2C bus is shared among all modules (that includes AUX PS module, too). It address is defined by R11, R12 and R13 pull-up resistors and ground connections on the backplane.


The MCU (IC9) on Fig. 4. is a SPI “slave” that communicates with the “master” MCU on the MCU module.


Power channel outputs can be synchronized with power outputs on the other modules thanks to OE_SYNC signal that is also controller by “master” MCU.


Fig. 3: Bias power supply, DIB interface

Digital control

The DCM220 comes with STM32F373C8T6 (IC8), a mainstream mixed signals MCUs ARM Cortex-M4 core with DSP and FPU with 64 KiB Flash, 72 MHz CPU and MPU. It's also featuring 12-bit DACs and 16-bit Sigma-delta ADCs (with inputs multiplexer).


Controlling DCM220 power channels require two DAC channels (one for programming voltage and current) that gives four channels in total. Since selected MCU comes only with three DAC outputs, two are used for set output voltage (U_SET_OUT#1, U_SET_OUT#2) and remaining two required to set output currents are generated using MCU's PWM outputs.

16-bit ADCs are used for monitoring output voltage and current. Power output voltage value is derived with simple voltage dividers (R42, R49 on Fig. 5., and R68, R75 on Fig. 6.) that are set to provide +2.5 V for full scale. ADC voltage reference (+VREF) is provided by IC9.


Power output current value is measured by DC/DC controller (IC11, IC13) and available on its ISMON pin. Since its output range is from zero to just 1.5 V, a gain of x2 is selected in firmware on ADC's current inputs (I_MON#1, I_MON#2).

Output voltage programming

The output voltage is programmed by affecting FB pin voltage that is set by voltage divider R41, R48 on channel 1 and R67, R76 on channel 2 (the DAC outputs are brought via R50 and R76). The output voltage on the channel 1 can be calculated taking into account the following equations:



Vout = VFB + IR41 * R41

(Eq. 1)


IR41 = IR48 + IR50

(Eq. 2)


IR48 = VFB / R48

(Eq. 3)


IR50 = (VFB - VDAC) / R50

(Eq. 4)


The VFB voltage for selected DC/DC controller is 1.2 V, while VDAC voltage range is from 0 to +2.5 V. Substituting Equations 2 through 4 into Equation 1 yields:



VOUT = VFB * (1 + (R41 / R48)) + (VFB - VDAC) * (R41 / R50)

(Eq. 5)


From Equation 5, it can be seen that the maximum output voltage occurs for the minimum DAC voltage, and vice versa. We can calculate what is a max. output voltage by applying VDAC = 0 V:



VOUT = 1.2 * (1 + (30 kΩ / 3.9 kΩ)) + (1.2 - 0) * (30 kΩ / 3.6 kΩ) = 20.43 V

Output current programming

Conversion of PWM to analog signals for current programming is accomplished with DC filtering and additional ripple cancellation (IC6) as proposed by Stephen Woodward (see EDN article Cancel PWM DAC ripple with analog subtraction, November 28, 2017).

The output current programming value comes to CTRL1 input of the DC/DC controller and it has to be in range from 0 to +1.5 V. Therefore an op-amp (IC10B, IC10A) is used to attenuate current programming signal by 0.45 since its range is from 0 to +3.3 V.


Fig. 4: Digital control and temperature sensors

Temperature is measured by two NTCs (NTC1, NTC2) that make voltage dividers with R21 and R22. NTC's are positioned close to DC-DC controllers (IC11, IC13). Voltage dividers outputs vary with temperature and they are brought to ADC inputs TEMP#1 and TEMP#2.


The MCU firmware could be uploaded by set BOOT0 input to +3.3 V during the power-up or reset and use UART for communication with programmer (that could be “master” MCU on the MCU module). Additionally, for development purposes it is possible to solder X3 connector and used ST-LINK compatible in-circuit debugger/programmer.

UART communication that is required for firmware upload needs accurate clock and that is a main reason why external clock source (Y1) is used instead of internal RC 8 MHz oscillator.

Power channels

The DCM220 module comes with two identical power channels based on 60 V high current step-down synchronous LED driver controller (IC11, IC13) as shown on Fig. 5 and Fig. 6. They are sharing the same power input of +48 Vdc and consequently share the same ground.


The LT3763 comes current programming and monitoring that can be used for digital control and can work in CV (Constant Voltage) or CC (Constant Current) mode.

Unfortunately, it does not provides an indication of the mode of operation. Therefore the CC mode indication is accomplished on presumption that it currently does not works in CV mode and that is when voltage on the FB pin is below 1.4 V. Comparators (IC12B, IC12A) are used to check voltage level on the FB1 and FB2 pins that are buffered with IC12C, IC12D to minimize interference with the CV control loop.

Comparator's outputs are brought to MCU's digital inputs CC#1, CC#2 that can be used by firmware to indicate that on the TFT display or by activating red LEDs of bicolor LED1, LED2 (via Q5, Q10). Activation of that LEDs depend also of channel output state, and its disabled by when channel's output is disabled.


Power outputs state are directly controlled by MCU digital outputs OE#1, OE#2 brought to DC/DC controller's EV/ULVO input and that signals are used to drive green LEDs of bicolor LED1, LED2 (Q4, Q9).


Fig. 5: Sync buck for power channel #1

The DC/DC converter is equipped with internal regulator with Vin as a power input and provides +5 V on its output that is used for powering internal logic and to some extent external circuit if total consumption does not exceeds 60 mA. Measured internal consumption is about 22 mA that with voltage drop of 43 V requires that almost 1 W is dissipated. It comes in package with thermal pad, but that is not enough if huge underlying PCB cooling plane cannot be provided. That usually asks for at least 4-layer PCB that could increase production costs significantly.

The usage of 4-layer PCB is avoided by adding simple voltage regulator (Q1, Q6) on the Vin pin. It is tracking power output voltage and insure difference of at least +7 V (defined by ZD2, ZD4 and Vgs(th) that is 1.8 V max. for the selected MOSFET) that is required for normal operation. Therefore the internal regulator will be supplied with about +7 to 27 V instead of continuous +48 V that reduces its dissipation significantly, or better to say, move it to the voltage regulator's MOSFET that comes in bigger package and can be cooled down much easier.

When DC/DC converter is disabled, voltage on the Vin rises to the power input value (+48 V). To avoid damage of the MOSFET (Q1, Q6) in that case, common anode diodes D3, D6 as protection are added.


Fig. 6: Sync buck for power channel #2

Power outputs are equipped with LC filters (L3, C61 and L5, C81) to reduce ripple and noise and protected against over-voltage and reverse polarity with TVS diodes ZD3, ZD5.



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