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114 lines
3.1 KiB
114 lines
3.1 KiB
/** |
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****************************************************************************** |
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* @file stm32l496g_discovery_sram.h |
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* @author MCD Application Team |
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* @brief This file contains the common defines and functions prototypes for |
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* the stm32l496g_discovery_sram.c driver. |
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****************************************************************************** |
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* @attention |
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* |
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* <h2><center>© Copyright (c) 2017 STMicroelectronics. |
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* All rights reserved.</center></h2> |
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* |
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* This software component is licensed by ST under BSD 3-Clause license, |
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* the "License"; You may not use this file except in compliance with the |
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* License. You may obtain a copy of the License at: |
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* opensource.org/licenses/BSD-3-Clause |
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* |
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****************************************************************************** |
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*/ |
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/** @addtogroup BSP |
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* @{ |
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*/ |
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/** @addtogroup STM32L496G_DISCOVERY |
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* @{ |
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*/ |
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/* Define to prevent recursive inclusion -------------------------------------*/ |
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#ifndef __STM32L496G_DISCOVERY_SRAM_H |
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#define __STM32L496G_DISCOVERY_SRAM_H |
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#ifdef __cplusplus |
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extern "C" { |
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#endif |
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/* Includes ------------------------------------------------------------------*/ |
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#include "stm32l4xx_hal.h" |
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/** @addtogroup STM32L496G_DISCOVERY_SRAM |
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* @{ |
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*/ |
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/* Exported constants --------------------------------------------------------*/ |
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/** @defgroup STM32L496G_DISCOVERY_SRAM_Exported_Constants Exported Constants |
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* @{ |
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*/ |
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/** |
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* @brief SRAM status structure definition |
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*/ |
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#define SRAM_OK 0x00 |
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#define SRAM_ERROR 0x01 |
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#define SRAM_DEVICE_ADDR ((uint32_t)0x64000000) |
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#define SRAM_DEVICE_SIZE ((uint32_t)0x80000) /* SRAM device size in MBytes */ |
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/* #define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_8 */ |
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#define SRAM_MEMORY_WIDTH FMC_NORSRAM_MEM_BUS_WIDTH_16 |
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#define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_DISABLE |
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/* #define SRAM_BURSTACCESS FMC_BURST_ACCESS_MODE_ENABLE*/ |
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#define SRAM_WRITEBURST FMC_WRITE_BURST_DISABLE |
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/* #define SRAM_WRITEBURST FMC_WRITE_BURST_ENABLE */ |
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/* DMA definitions for SRAM DMA transfer */ |
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#define SRAM_DMAx_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE |
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#define SRAM_DMAx_CHANNEL DMA1_Channel1 |
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#define SRAM_DMAx_IRQn DMA1_Channel1_IRQn |
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#define SRAM_DMAx_IRQHandler DMA1_Channel1_IRQHandler |
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/** |
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* @} |
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*/ |
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/* Exported functions --------------------------------------------------------*/ |
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/** @addtogroup STM32L496G_DISCOVERY_SRAM_Exported_Functions |
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* @{ |
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*/ |
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uint8_t BSP_SRAM_Init(void); |
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uint8_t BSP_SRAM_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize); |
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uint8_t BSP_SRAM_ReadData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize); |
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uint8_t BSP_SRAM_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize); |
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uint8_t BSP_SRAM_WriteData_DMA(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize); |
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void BSP_SRAM_DMA_IRQHandler(void); |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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#ifdef __cplusplus |
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} |
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#endif |
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#endif /* __STM32L496G_DISCOVERY_SRAM_H */ |
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/** |
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* @} |
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*/ |
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/** |
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* @} |
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*/ |
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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